Job DescriptionDigital Design Engineer
Location: Menlo Park, CA/ Redmond, WA
Duration: 12 monthsDescription:
- Digital Design Engineer to implement custom logic in ASIC for client's AR/VR products and in FPGA for prototyping and research. Areas of interests include Graphics, Audio or Compression. Primary language is SystemVerilog with some HLS where it is effective.
- Implement and deliver verified RTL blocks based on architectural and micro-architectural requirements.
- Contribute to the architectural and micro-architectural requirements.
- Support the Digital Verification, Physical Design, and Firmware teams to ensure correctness of the delivered RTL.
- Respond to issues found by engineers running the Lint, CDC, STA, Synthesis, and LEC tools.
- Support handoff of RTL blocks to prototyping engineers for integrating the delivered RTL into FPGA platforms.Top non-negotiable skill sets needed to be successful in this role:
Skills:Key Skill Requirements:
- Experience with Verilog or SystemVerilog RTL coding for ASIC releases.
- History of successful tape out of several ASIC releases using SystemVerilog RTL coding (Additional FPGA experience is a plus).
- Experience with closing timing and meeting power consumption goals in large designs in advanced technology nodes (sub-10nm geometries is a plus).
- Scripting language experience such as Python, Perl, TCL, etc. (Python is a plus).
- Debugging experience in simulation, emulation, and system bring-up in collaboration with Verification, Emulation, Physical Design, Firmware teams, etc.
- Bachelor's degree in Electrical or Computer Engineering, with 5 years of relevant ASIC digital design experience
English Read Write SpeakSkills Required:
- RTL Design
As an equal opportunity employer, ICONMA prides itself on creating an employment environment that supports and encourages the abilities of all persons regardless of race, color, gender, age, sexual orientation, citizenship, or disability.
Posting ID: 559417864Posted: 2020-06-10