Principal Engineer, Hardware Design (High-Speed Interfaces) (AI2411)
•Today
| Verified Pay check_circle | Provided by the employer$220000 - $296400 per year |
|---|---|
| Hours | Full-time |
| Location | San Jose, California |
About this job
Job Description
Job Description In addition to base salary, this role is also eligible for private company equity, and a comprehensive package of employee benefits. Please note that the salary ranges listed for U.S. roles reflect base salary only and do not include equity or other forms of compensation.
Job Title: Principal Engineer, Hardware Design (High-Speed Interfaces)
Job Location: San Jose, CA (This position requires a full-time, on-site presence in our San Jose, CA office)
Job ID: AI2411
Description:
Job Description:
We are seeking a Principal ASIC Design Engineer with deep expertise in the design and integration of high-speed interfaces such as PCIe, Ethernet, USB, and UCIe. The ideal candidate will play a key role in SoC development, from microarchitecture and RTL implementation to IP integration, verification, and silicon bring-up. This position offers the opportunity to shape and influence the design architecture and methodology of the high speed interfaces in SIMa SOC in a fast-paced startup environment.
Areas of Focus:
- Lead the implementation and integration of high-speed interface IPs (PCIe, Ethernet, USB, UCIe) into complex SoC architectures.
- Evaluate and integrate 3rd-party IP blocks, ensuring compliance, performance, and seamless interoperability.
- Collaborate with system architects, verification, physical design, and firmware teams to ensure interface functionality meets system-level requirements.
- Develop RTL design for custom logic around the interfaces, including protocol adaptation and data-path optimizations.
- Participate in lab bring-up and silicon debug for high-speed interfaces, including analyzing waveforms, signal integrity, and protocol-level behavior.
- Work closely with software/firmware teams to ensure proper hardware–software interaction, register mapping, and driver validation.
- Define and drive design methodologies and best practices for interface design and integration.
Key Requirements:
- Master’s degree in Electrical Engineering, Computer Engineering, or related field.
- 10+ years of experience in ASIC/SoC design, with a strong focus on high-speed interfaces
- Experience of implementing or integrating PCIe interface is a must
- Deep knowledge of PCIe, Ethernet (1G/10G/25G+), USB (3.x), UCIe, and related standards.
- Hands-on experience with RTL design (Verilog/SystemVerilog) and synthesis, timing closure, and DFT concepts.
- Proven experience integrating 3rd-party IPs into large SoCs.
- Solid understanding of system-level design concepts — including link training, flow control, and SW driver interaction.
- Experience with post-silicon validation and debug, using lab equipment such as oscilloscopes, logic analyzers, and protocol analyzers.
- Exposure to firmware or driver development for PCIe, Ethernet, or USB is highly preferred
Personal attributes:
Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills.
The annual salary for this position ranges from $220,000 - $296,400. The actual annual salary offered will depend on several factors, including - among others - job-related skills, experience, technical expertise, qualifications, work location, and business needs. The annual salary range for this position is subject to change and may be adjusted in the future.
EEO Employer: SiMa is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
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