Digital Design Engineer
| Verified Pay check_circle | Provided by the employer$130000 - $225000 per year |
|---|---|
| Hours | Full-time |
| Location | Saratoga, California |
About this job
Job Description
We are seeking experienced Digital Design Engineers to join our Satellite Avionics team. In this role you will own the electrical design of complex digital boards for a next-generation satellite constellation, including high-speed interfaces, FPGA integration, and mixed-signal subsystems. You will play a central role in delivering flight-qualified avionics hardware from concept through qualification.
Key Responsibilities:- Own schematic design and component selection for digital avionics boards, from concept through flight qualification.
- Design high-speed SERDES interfaces (PCIe, JESD, gigabit links) and DDR4/DDR5 memory interfaces with proper timing closure.
- Develop clocking architectures including PLL configuration, jitter management, and clock distribution networks.
- Perform power budgeting and system-level power allocation across board subsystems.
- Apply radiation-tolerant design techniques including SEU/SEE mitigation, TID considerations, and appropriate component derating.
- Collaborate with FPGA engineers on support circuitry design, pinout planning, and power/layout requirements.
- Drive board bring-up activities including configuration, interface verification, and structured debugging.
- Participate in design reviews and cross-functional integration with RF, power, thermal, and mechanical teams.
- Own schematic design and component selection for digital avionics boards, from concept through flight qualification.
- Design high-speed SERDES interfaces (PCIe, JESD, gigabit links) and DDR4/DDR5 memory interfaces with proper timing closure.
- Develop clocking architectures including PLL configuration, jitter management, and clock distribution networks.
- Perform power budgeting and system-level power allocation across board subsystems.
- Apply radiation-tolerant design techniques including SEU/SEE mitigation, TID considerations, and appropriate component derating.
- Collaborate with FPGA engineers on support circuitry design, pinout planning, and power/layout requirements.
- Drive board bring-up activities including configuration, interface verification, and structured debugging.
- Participate in design reviews and cross-functional integration with RF, power, thermal, and mechanical teams.
- Experience with satellite or spacecraft avionics design and qualification (EM/QM/FM build cycles).
- Background in non-volatile memory technologies (Flash, MRAM, FRAM) and in-system programmability.
- Exposure to power supply design and power integrity analysis for digital boards.
- Experience with design for radiation reliability and single-event effects mitigation at the board level.
- Familiarity with signal integrity simulation tools (HyperLynx SI/PI, Ansys, ADS).
- Altium Designer (schematic capture and layout review)
- HyperLynx SI, SI/PI, and Full-Wave (signal and power integrity)
- SPICE-based circuit simulation
- FPGA vendor toolchains (for interface bring-up and debug)
We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.