Senior Staff Verification Consultant
•Today
| Verified Pay check_circle | Provided by the employer$85 - $90 per hour |
|---|---|
| Hours | Full-time, Part-time |
| Location | 3900 N Capital of Texas Hwy Austin, Texas open_in_new |
About this job
Job Description
Job Description
We are seeking a highly experienced Senior Staff System IP Design Verification Engineer/Consultant to contribute to the functional verification of System IP, including coherent interconnects and caches. This is a highly technical individual contributor role requiring strong hands-on experience in Design Verification, with expertise at both block-level and top-level verification.
The ideal candidate will have extensive experience developing verification environments, debugging complex functional failures, running gate-level simulations, and driving coverage closure.
Key Responsibilities
- Own gate-level simulation testbench bring-up and debugging.
- Own power-aware verification using UPF.
- Collaborate with Physical Design teams to run and debug gate-level simulations.
- Work closely with SoC teams to debug functional failures during IP bring-up and feature execution.
- Create and maintain testbenches, verification environments, stimulus, and tests.
- Collaborate with RTL/design engineers to verify design features and resolve functional failures.
- Develop SystemVerilog assertions, checkers, covergroups, and constraints.
- Debug and root-cause functional failures from regression testing.
- Analyze code coverage and functional coverage and perform coverage gap analysis.
- Support silicon bring-up and root-cause hardware/functional failures.
- Contribute to verification strategy, execution, and overall coverage closure.
Required Qualifications
- Bachelor's, Master's, or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field.
- 12+ years of industry experience in Design Verification.
- Expert hands-on coding skills in testbench development, stimulus generation, checkers, and coverage closure.
- Strong experience with SystemVerilog and UVM or equivalent verification methodologies.
- 5+ years of hands-on experience with gate-level simulations.
- Strong knowledge of ARM protocols or equivalent, including:
- CHI
- AXI
- ACE-Lite
- APB
- Experience with Git version control.
- Strong scripting experience with Unix/Linux, Perl, and/or Python.
- Excellent written and verbal communication skills.
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Full-time Jobs Part-time Jobs Gig Jobs Posting ID: 1284784047 Posted: 2026-08-17 Job Title: Senior Staff Verification Consultant