Signal Integrity Engineer, Senior Staff

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Central Engineering - AMS Signal Integrity

What You Can Expect

Your Responsibilities Will Include But Not Be Limited To

We are looking for a talented senior level Signal Integrity Engineer to join our Central Engineering team This role is responsible for definition, analysis and verification of the system interconnect for high speed digital systems of various systems.

• Interfacing with circuit design, applications engineering, packaging technology, and board design teams to define & implement system interconnect that meet internal specifications and customer requirements.
• Responsible for deliverables, which will include timing assessment, bump/rdl, package bump/ballout specifications, and developing reference routing for package/board and customer design guidelines,
• Responsible for and involved in Signal integrity and Power Delivery simulations, signal integrity tools and lab debug/measurements

What We're Looking For

• Bachelor's degree in Electrical Engineering or related fields and 5-10 years of related professional experience. Master's degree and/or PhD in Electrical Engineering or related fields with 3-5 years of experience.
• Experience in using at least one of extractions/simulation tools such as HFSS/Q3D/Hspice is a must. Experience with lab equipment such as oscilloscopes, network analyzers is required.
• IO circuits (board, chip and transistor level), high speed digital design, PCB layout, and Package technology.
• Experience in interfaces such as DDR, Nand, PCIe/USB/SATA or other high speed parallel/serial bus is a plus
• Always do the right thing and represent Marvell with ethics and integrity.

#LI-TD1

Expected Base Pay Range (USD)

123,200 - 182,370, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .